1. Field of the Invention
The current invention relates to the field of electronic circuits and more particularly to the design and manufacture of high-speed output buffers.
2. Description of Related Art
As integrated circuits are designed to operate at increasingly higher frequencies, noisy, distorted, and/or inconsistent signals can cause devices such as output buffers to produce poor quality output. Preferably, an output buffer may provide a clean, symmetric, well-shaped output waveform even if the input signals are noisy or of poor quality. However, an output buffer may receive an asymmetric, low quality differential signal with a substantial and/or inconsistent amplitude variation and/or a common mode component. In many cases, the quality of the differential input signal may degrade with increased operating frequency. An eye diagram, constructed by overlaying the output votage waveforms for many clock cycles, may be used indicate the fidelity or quality of a signal put through an electronic buffer circuit. A high quality output waveform may have an eye diagram with a symmetric shape that approaches the shape of a square wave. Often, it is desirable to have a buffer output waveform with a centered or controllable crossing point (the point where the rising and falling signals intersect). The output crossing point may be characterized by the crossing point voltage (Vcross,out). For a differential output buffer, each of the output waveforms has an associated crossing point voltage.
One method for improving the quality of an output buffer signal and/or controlling Vcross,out is to incorporate a feedback loop into the buffer's design. However, the incorporation of a feedback loop can be tricky and expensive to implement. This may be due, in part, to complexities related to designing a circuit that determines Vcross,out from the actual output signal without highly restrictive assumptions about the data pattern. For instance, a static replica circuit cannot determine Vcross,out because Vcross,out depends on the shape of the rising and falling edges. Alternately, a correction signal may be generated and combined with the output buffer signal to yield the final output signal with a desirable Vcross,out. However, properly matching delays between the high-speed signal paths can be especially difficult.
Accordingly, it is desirable to have an inexpensive and robust output buffer designed for operation over a wide frequency range, capable of providing high quality output signals when provided with variable and/or poor quality differential input signals. Preferably, the output buffer may be manufactured using currently available semiconductor technologies and incorporated into small footprint integrated circuits.